Silicon carbide (SiC) is excellent in heat resistance and mechanical strength and is physically and chemically stable, so is focused on as an environmentally resistant semiconductor material. Further, in recent years, demand for SiC single crystal substrates as substrates for high frequency, high withstand voltage electronic devices etc. has been rising.
If using an SiC single crystal substrate to fabricate a power device, high frequency device, etc., usually an SiC thin film is epitaxially grown on a substrate by the method called the “thermal CVD method” (thermal chemical vapor deposition method) or a dopant is directly implanted by the ion implantation method. However, in the latter case, annealing at a high temperature becomes required after implantation, so epitaxial growth is often used to form a thin film.
Here, as defects present in an SiC epitaxial film, there are triangular shaped defects, carrot defects, comet defects, etc. These are known as so-called “killer defects” which degrade the characteristics of devices. Furthermore, in recent years, basal plane dislocations in an epitaxial film have become an issue due to having an effect on the device characteristics. Such the basal plane dislocations are part of dislocations which are present in the SiC single crystal substrate, which are passed on to the epitaxial growth layer. It is known that usually they break into two partial dislocations and are accompanied with stacking defects between them (see NPLT 1). Further, if such stacking defects are present inside a device, the reliability is detrimentally affected (see NPLT 2), so reduction of the basal plane dislocations in the epitaxial growth layer is an important issue.
FIG. 1 is a schematic view of basal plane dislocations present in an SiC single crystal substrate. Reference numeral 1 shows basal plane dislocations. When SiC epitaxial growth on this SiC single crystal substrate proceeds, the dislocations advance more in the epitaxial growth direction (“a” direction) rather than advancing in the basal plane direction (“b” direction) resulting in the elastic energy held becoming smaller (lengths of dislocations becoming shorter) and are easily converted to edge dislocations with equal Burgers vectors. As a result, in general, about 90 to 93% of the basal plane dislocations of a SiC single crystal substrate are converted to threading edge dislocations at the substrate/epitaxial film interface. However, for example, the density of basal plane dislocations in a 4° off substrate having an off angle of 4° with respect to the (0001) plane is 4000/cm2 or so, so the density of basal plane dislocations which remain (are left) in the epitaxial film by about 7 to 10% without being converted becomes 280 to 400/cm2 or so.
On the other hand, electrodes of devices are currently 2 to 3 mm square in size, so a single device will contain at least 10 basal plane dislocations. This becomes a factor lowering the device characteristics and yield. An effective method for lowering the basal plane dislocation density is to reduce the off angle of the substrate more, but the number of steps on the substrate is decreased, therefore so-called “step-flow growth” becomes harder at the time of epitaxial growth. As a result, the above-mentioned killer defects increase and the resulting degradation of device characteristics and yield becomes a problem.
Therefore, in epitaxial SiC single crystal wafers, for which greater application to devices is expected in the future, it is necessary to further increase the conversion efficiency from basal plane dislocations to threading edge dislocations, reduce basal plane dislocations passed over from the substrate to the epitaxial growth layer, and suppress the increase of killer defects. As explained above, there is also the method of further reducing the off angle of the substrate to lower the basal plane dislocation density, but with the current state of the art, for suppressing killer defects to the practical device level, use of a 4° off or so substrate is the limit. As a result, basal plane dislocations remaining in the epitaxial film are insufficiently reduced and the device characteristics end up deteriorating and the yield falling.
Note that, it is known to etch an SiC single crystal substrate by molten KOH and epitaxially grow a film thereon so that the basal plane dislocations of the substrate are converted to threading edge dislocations (see NPLT 3). However, with such a method, it is necessary to individually perform the etching of the SiC single crystal substrate and epitaxial growth of SiC so the processing becomes complicated. In addition, the molten KOH causes deep etch pits to be formed, so the scars remain even after subsequent epitaxial growth and a smooth surface cannot be obtained. Further, it is difficult to sufficiently raise the conversion efficiency from basal plane dislocations to threading edge dislocation at the interface of the epitaxial growth layer and SiC single crystal substrate.
PLT 1 discloses a method of forming at least one suppression layer comprised of a silicon carbide single crystal film and having an Ra value of a surface roughness of 0.5 nm to 1.0 nm on a silicon carbide single crystal substrate so as to suppress the formation of defects. PLT 1 specifies that by making the Ra value of surface roughness within the above range, the number of atoms taken into a step is increased and the step flow is promoted. However, PLT 1 does not disclose or suggest the relationship between the etching of the silicon carbide single crystal substrate and the reduction of the basal plane dislocations. Further, PLT 1 does not quantitatively evaluate the rate of conversion of basal plane dislocations to threading edge dislocations.
PLT 2 discloses the process of epitaxially growing a buffer layer comprised of a silicon carbide crystal on the surface of a hydrogen etched silicon carbide single crystal substrate so as to form a buffer layer, etching the surface of the buffer layer by hydrogen, and epitaxially growing a silicon carbide crystal on the surface of the buffer layer to form a finishing layer. It discloses that by virtue of forming the buffer layer, propagation of the basal plane defects from the silicon carbide single crystal substrate is suppressed and that by forming the finishing layer on the surface of the hydrogen etched buffer layer, propagation of basal plane dislocations arising from the silicon carbide single crystal substrate is further reduced and a finishing layer reduced in defects arising from the buffer layer can be formed. However, with the method of production disclosed in PLT 2, if omitting the hydrogen etching of the buffer layer, the yield of the production of the semiconductor substrate is liable to become lower.
PLT 3 discloses a method of production of a silicon carbide ingot for forming a silicon carbide layer on a base substrate comprised of single crystal silicon carbide with an off angle of 0.1° to 10° in either the off angle direction of the <11-20> direction or <1-100> direction with respect to the (0001) plane. However, PLT 3 does not disclose or suggest the relationship between the etching of the base substrate and the reduction of basal plane dislocations. Further, in PLT 3, the rate of conversion of basal plane dislocations to threading edge dislocations is not quantitatively evaluated.